diff -rupN bminch-asmusb-lab1-fs-gpasm/lab1.asm bminch-asmusb-lab1-14k50-gpasm/lab1.asm
--- bminch-asmusb-lab1-fs-gpasm/lab1.asm	2010-05-16 03:50:59.000000000 +0200
+++ bminch-asmusb-lab1-14k50-gpasm/lab1.asm	2010-07-11 20:05:45.000000000 +0200
@@ -17,6 +17,9 @@
 ;                  bits 0, 1, and 7 of USTAT on TRNIF in ServiceUSB.
 ;     04/21/2005 - Initial public release.
 ;
+;     11/07/2010 - The code was adapted to the low pin count PIC18f14k50
+;                  by Peter Jakab, see http://jap.hu/electronic/pic18-usb.html
+;
 ; ============================================================================
 ; 
 ; Peripheral Description:
@@ -38,7 +41,7 @@
 ; TO THIS SOFTWARE. THE AUTHOR SHALL NOT, UNDER ANY CIRCUMSTANCES, BE LIABLE 
 ; FOR SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
 ; 
-#include <p18F2550.inc>
+#include <p18f14k50.inc>
 #include "usb_defs.inc"
 #include "engr2210.inc"
 
@@ -55,44 +58,36 @@
 ;			__CONFIG	_CONFIG7L, _EBTR0_OFF_7L & _EBTR1_OFF_7L & _EBTR2_OFF_7L & _EBTR3_OFF_7L
 ;			__CONFIG	_CONFIG7H, _EBTRB_OFF_7H
 
-			config PLLDIV = 1
-			config CPUDIV = OSC3_PLL4
-			config USBDIV = 2
-			config FOSC = XTPLL_XT
-;			config FCMEM = OFF
+			config PLLEN = ON
+			config CPUDIV = NOCLKDIV
+			config USBDIV = OFF
+			config FOSC = HS
+			config PCLKEN = ON
+			config HFOFST = OFF
+			config FCMEN = OFF
 			config IESO = OFF
-			config PWRT = OFF
-			config BOR = ON
-;			config BORV = 21
-			config VREGEN = ON
-			config WDT = OFF
+			config PWRTEN = OFF
+			config BOREN = OFF
+			config BORV = 30
+;			config VREGEN = ON
+			config WDTEN = OFF
 			config WDTPS = 32768
 			config MCLRE = ON
-			config LPT1OSC = OFF
-			config PBADEN = OFF
-			config CCP2MX = ON
 			config STVREN = ON
 			config LVP = OFF
 ;			config ICPRT = OFF
 			config XINST = OFF
-			config DEBUG = OFF
 			config CP0 = OFF
 			config CP1 = OFF
-			config CP2 = OFF
-			config CP3 = OFF
 			config CPB = OFF
 			config CPD = OFF
 			config WRT0 = OFF
 			config WRT1 = OFF
-			config WRT2 = OFF
-			config WRT3 = OFF
 			config WRTB = OFF
 			config WRTC = OFF
 			config WRTD = OFF
 			config EBTR0 = OFF
 			config EBTR1 = OFF
-			config EBTR2 = OFF
-			config EBTR3 = OFF
 			config EBTRB = OFF
 
 #define	SHOW_ENUM_STATUS
@@ -257,9 +252,9 @@ InitUSB
 			movlw		NO_REQUEST
 			movwf		USB_dev_req, BANKED		; No device requests in process
 #ifdef SHOW_ENUM_STATUS
-			clrf		TRISB, ACCESS			; set all bits of PORTB as outputs
+			clrf		TRISC, ACCESS			; set all bits of PORTB as outputs
 			movlw		0x01
-			movwf		PORTB, ACCESS			; set bit zero to indicate Powered status
+			movwf		PORTC, ACCESS			; set bit zero to indicate Powered status
 #endif
 			repeat								; do nothing...
 			untilclr UCON, SE0, ACCESS			; ...until initial SE0 condition clears 
@@ -268,7 +263,8 @@ InitUSB
 ServiceUSB
 			select
 				caseset	UIR, UERRIF, ACCESS
-					clrf		UEIR, ACCESS
+					banksel		UEIR
+					clrf		UEIR, BANKED
 					break
 				caseset UIR, SOFIF, ACCESS
 					bcf			UIR, SOFIF, ACCESS
@@ -278,8 +274,8 @@ ServiceUSB
 					bsf			UCON, SUSPND, ACCESS
 #ifdef SHOW_ENUM_STATUS
 					movlw		0xE0
-					andwf		PORTB, F, ACCESS
-					bsf			PORTB, 4, ACCESS
+					andwf		PORTC, F, ACCESS
+					bsf			PORTC, 4, ACCESS
 #endif
 					break
 				caseset UIR, ACTVIF, ACCESS
@@ -287,7 +283,7 @@ ServiceUSB
 					bcf			UCON, SUSPND, ACCESS
 #ifdef SHOW_ENUM_STATUS
 					movlw		0xE0
-					andwf		PORTB, F, ACCESS
+					andwf		PORTC, F, ACCESS
 					banksel		USB_USWSTAT
 					movf		USB_USWSTAT, W, BANKED
 					select
@@ -303,7 +299,7 @@ ServiceUSB
 						case CONFIG_STATE
 							movlw	0x08
 					ends
-					iorwf		PORTB, F, ACCESS
+					iorwf		PORTC, F, ACCESS
 #endif
 					break
 				caseset	UIR, STALLIF, ACCESS
@@ -316,22 +312,15 @@ ServiceUSB
 					bcf 		UIR, TRNIF, ACCESS
 					bcf			UIR, TRNIF, ACCESS
 					bcf			UIR, TRNIF, ACCESS
-					clrf		UEP0, ACCESS			; clear all EP control registers to disable all endpoints
-					clrf		UEP1, ACCESS
-					clrf		UEP2, ACCESS
-					clrf		UEP3, ACCESS
-					clrf		UEP4, ACCESS
-					clrf		UEP5, ACCESS
-					clrf		UEP6, ACCESS
-					clrf		UEP7, ACCESS
-					clrf		UEP8, ACCESS
-					clrf		UEP9, ACCESS
-					clrf		UEP10, ACCESS
-					clrf		UEP11, ACCESS
-					clrf		UEP12, ACCESS
-					clrf		UEP13, ACCESS
-					clrf		UEP14, ACCESS
-					clrf		UEP15, ACCESS
+					banksel UEP0
+					clrf		UEP0, BANKED			; clear all EP control registers to disable all endpoints
+					clrf		UEP1, BANKED
+					clrf		UEP2, BANKED
+					clrf		UEP3, BANKED
+					clrf		UEP4, BANKED
+					clrf		UEP5, BANKED
+					clrf		UEP6, BANKED
+					clrf		UEP7, BANKED
 					banksel		BD0OBC
 					movlw		MAX_PACKET_SIZE
 					movwf		BD0OBC, BANKED
@@ -347,12 +336,13 @@ ServiceUSB
 					movwf		BD0IAH, BANKED			; ...set up its address
 					movlw		0x08					; clear UOWN bit (MCU can write)
 					movwf		BD0IST, BANKED
-					clrf		UADDR, ACCESS			; set USB Address to 0
+					banksel		UADDR
+					clrf		UADDR, BANKED			; set USB Address to 0
 					clrf		UIR, ACCESS				; clear all the USB interrupt flags
 					movlw		ENDPT_CONTROL
-					movwf		UEP0, ACCESS			; EP0 is a control pipe and requires an ACK
+					movwf		UEP0, BANKED			; EP0 is a control pipe and requires an ACK
 					movlw		0xFF					; enable all error interrupts
-					movwf		UEIE, ACCESS
+					movwf		UEIE, BANKED
 					banksel		USB_USWSTAT
 					movlw		DEFAULT_STATE
 					movwf		USB_USWSTAT, BANKED
@@ -360,12 +350,12 @@ ServiceUSB
 					movwf		USB_device_status, BANKED	; self powered, remote wakeup disabled
 #ifdef SHOW_ENUM_STATUS
 					movlw		0xE0
-					andwf		PORTB, F, ACCESS
-					bsf 		PORTB, 1, ACCESS		; set bit 1 of PORTB to indicate Powered state
+					andwf		PORTC, F, ACCESS
+					bsf 		PORTC, 1, ACCESS		; set bit 1 of PORTB to indicate Powered state
 #endif
 					break
 				caseset	UIR, TRNIF, ACCESS
-					movlw		0x04
+					movlw		high BD0OST
 					movwf		FSR0H, ACCESS
 					movf		USTAT, W, ACCESS
 					andlw		0x7C					; mask out bits 0, 1, and 7 of USTAT
@@ -395,7 +385,7 @@ ServiceUSB
 							movlw		0x80
 							break
 					ends
-					xorwf		PORTB, F, ACCESS		; toggle bit 5, 6, or 7 of PORTB to reflect EP activity
+					xorwf		PORTC, F, ACCESS		; toggle bit 5, 6, or 7 of PORTB to reflect EP activity
 #endif
 					clrf		USB_error_flags, BANKED	; clear USB error flags
 					movf		USB_buffer_desc, W, BANKED
@@ -823,21 +813,15 @@ StandardRequests
 					break
 				case SET_CONFIGURATION
 					ifl USB_buffer_data+wValue, LE, NUM_CONFIGURATIONS
-						clrf		UEP1, ACCESS		; clear all EP control registers except for EP0 to disable EP1-EP15 prior to setting configuration
-						clrf		UEP2, ACCESS
-						clrf		UEP3, ACCESS
-						clrf		UEP4, ACCESS
-						clrf		UEP5, ACCESS
-						clrf		UEP6, ACCESS
-						clrf		UEP7, ACCESS
-						clrf		UEP8, ACCESS
-						clrf		UEP9, ACCESS
-						clrf		UEP10, ACCESS
-						clrf		UEP11, ACCESS
-						clrf		UEP12, ACCESS
-						clrf		UEP13, ACCESS
-						clrf		UEP14, ACCESS
-						clrf		UEP15, ACCESS
+						banksel		UEP1
+						clrf		UEP1, BANKED		; clear all EP control registers except for EP0 to disable EP1-EP15 prior to setting configuration
+						clrf		UEP2, BANKED
+						clrf		UEP3, BANKED
+						clrf		UEP4, BANKED
+						clrf		UEP5, BANKED
+						clrf		UEP6, BANKED
+						clrf		UEP7, BANKED
+						banksel		USB_buffer_data
 						movf		USB_buffer_data+wValue, W, BANKED
 						movwf		USB_curr_config, BANKED
 						select
@@ -846,8 +830,8 @@ StandardRequests
 								movwf		USB_USWSTAT, BANKED
 #ifdef SHOW_ENUM_STATUS
 								movlw		0xE0
-								andwf		PORTB, F, ACCESS
-								bsf			PORTB, 2, ACCESS
+								andwf		PORTC, F, ACCESS
+								bsf			PORTC, 2, ACCESS
 #endif
 								break
 							default
@@ -855,8 +839,8 @@ StandardRequests
 								movwf		USB_USWSTAT, BANKED
 #ifdef SHOW_ENUM_STATUS
 								movlw		0xE0
-								andwf		PORTB, F, ACCESS
-								bsf			PORTB, 3, ACCESS
+								andwf		PORTC, F, ACCESS
+								bsf			PORTC, 3, ACCESS
 #endif
 						ends
 						banksel		BD0IBC
@@ -934,14 +918,14 @@ VendorRequests
 			movf		USB_buffer_data+bRequest, W, BANKED
 			select
 				case SET_RA0
-					bsf			PORTA, 0, ACCESS		; set RA0 high
+					bsf			PORTB, 4, ACCESS		; set RA0 high
 					banksel		BD0IBC
 					clrf		BD0IBC, BANKED			; set byte count to 0
 					movlw		0xC8
 					movwf		BD0IST, BANKED			; send packet as DATA1, set UOWN bit
 					break
 				case CLR_RA0
-					bcf			PORTA, 0, ACCESS		; set RA0 low
+					bcf			PORTB, 4, ACCESS		; set RA0 low
 					banksel		BD0IBC
 					clrf		BD0IBC, BANKED			; set byte count to 0
 					movlw		0xC8
@@ -962,15 +946,17 @@ ProcessInToken
 					select
 						case SET_ADDRESS
 							movf		USB_address_pending, W, BANKED
-							movwf		UADDR, ACCESS
+							banksel		UADDR
+							movwf		UADDR, BANKED
+							banksel		USB_USTAT
 							select
 								case 0
 									movlw		DEFAULT_STATE
 									movwf		USB_USWSTAT, BANKED
 #ifdef SHOW_ENUM_STATUS
 									movlw		0xE0
-									andwf		PORTB, F, ACCESS
-									bsf			PORTB, 1, ACCESS
+									andwf		PORTC, F, ACCESS
+									bsf			PORTC, 1, ACCESS
 #endif
 									break
 								default
@@ -978,8 +964,8 @@ ProcessInToken
 									movwf		USB_USWSTAT, BANKED
 #ifdef SHOW_ENUM_STATUS
 									movlw		0xE0
-									andwf		PORTB, F, ACCESS
-									bsf			PORTB, 2, ACCESS
+									andwf		PORTC, F, ACCESS
+									bsf			PORTC, 2, ACCESS
 #endif
 							ends
 							break
@@ -1051,15 +1037,25 @@ SendDescriptorPacket
 APPLICATION	code
 Main
 			clrf		PORTA, ACCESS
-			movlw		0x0F
-			movwf		ADCON1, ACCESS			; set up PORTA to be digital I/Os
+			clrf		PORTB, ACCESS
+			clrf		PORTC, ACCESS
+			clrf		ANSEL, ACCESS
+			clrf		ANSELH, ACCESS
+			clrf		SLRCON, ACCESS
+			clrf		CM1CON0, ACCESS
+			clrf		CM2CON0, ACCESS
 			clrf		TRISA, ACCESS			; set up all PORTA pins to be digital outputs
+			clrf		TRISB, ACCESS
+			clrf		TRISC, ACCESS
+			;movlw		(1<<SPLLEN)
+			;movwf		OSCTUNE, ACCESS ; PLL already enabled, but...
+
 			call		InitUSB					; initialize the USB registers and serial interface engine
 			repeat
 				call		ServiceUSB			; service USB requests...
 				banksel		USB_USWSTAT
 			until USB_USWSTAT, EQ, CONFIG_STATE	; ...until the host configures the peripheral
-			bsf			PORTA, 0, ACCESS		; set RA0 high
+			bsf			PORTB, 5, ACCESS		; set RA0 high
 			banksel		COUNTER_L
 			clrf		COUNTER_L, BANKED
 			clrf		COUNTER_H, BANKED
@@ -1070,9 +1066,9 @@ Main
 					incf		COUNTER_H, F, BANKED
 				endi
 				ifset COUNTER_H, 7, BANKED
-					bcf			PORTA, 1, ACCESS
+					bcf			PORTB, 6, ACCESS
 				otherwise
-					bsf			PORTA, 1, ACCESS
+					bsf			PORTB, 6, ACCESS
 				endi
 				call		ServiceUSB
 			forever
diff -rupN bminch-asmusb-lab1-fs-gpasm/Makefile bminch-asmusb-lab1-14k50-gpasm/Makefile
--- bminch-asmusb-lab1-fs-gpasm/Makefile	2010-05-16 03:06:42.000000000 +0200
+++ bminch-asmusb-lab1-14k50-gpasm/Makefile	2010-07-11 01:02:53.000000000 +0200
@@ -2,7 +2,7 @@ lab1.hex: lab1.o
 	gplink -o lab1.hex lab1.o
 
 lab1.o: lab1.asm
-	gpasm -p p18f2550 -c lab1.asm
+	gpasm -p p18f14k50 -c lab1.asm
 
 burn: lab1.hex
 	pk2cmd -P -F lab1.hex -M
diff -rupN bminch-asmusb-lab1-fs-gpasm/usb_defs.inc bminch-asmusb-lab1-14k50-gpasm/usb_defs.inc
--- bminch-asmusb-lab1-fs-gpasm/usb_defs.inc	2010-05-16 02:50:57.000000000 +0200
+++ bminch-asmusb-lab1-14k50-gpasm/usb_defs.inc	2010-07-11 01:04:14.000000000 +0200
@@ -32,136 +32,72 @@
 #define TOKEN_SETUP	(0x0D<<2)
 
 ; Define buffer descriptor table register mapping for no ping-pong buffers
-#define BD0OST		0x0400
-#define BD0OBC		0x0401
-#define BD0OAL		0x0402
-#define BD0OAH		0x0403
-#define BD0IST		0x0404
-#define BD0IBC		0x0405
-#define BD0IAL		0x0406
-#define BD0IAH		0x0407
-#define BD1OST		0x0408
-#define BD1OBC		0x0409
-#define BD1OAL		0x040A
-#define BD1OAH		0x040B
-#define BD1IST		0x040C
-#define BD1IBC		0x040D
-#define BD1IAL		0x040E
-#define BD1IAH		0x040F
-#define BD2OST		0x0410
-#define BD2OBC		0x0411
-#define BD2OAL		0x0412
-#define BD2OAH		0x0413
-#define BD2IST		0x0414
-#define BD2IBC		0x0415
-#define BD2IAL		0x0416
-#define BD2IAH		0x0417
-#define BD3OST		0x0418
-#define BD3OBC		0x0419
-#define BD3OAL		0x041A
-#define BD3OAH		0x041B
-#define BD3IST		0x041C
-#define BD3IBC		0x041D
-#define BD3IAL		0x041E
-#define BD3IAH		0x041F
-#define BD4OST		0x0420
-#define BD4OBC		0x0421
-#define BD4OAL		0x0422
-#define BD4OAH		0x0423
-#define BD4IST		0x0424
-#define BD4IBC		0x0425
-#define BD4IAL		0x0426
-#define BD4IAH		0x0427
-#define BD5OST		0x0428
-#define BD5OBC		0x0429
-#define BD5OAL		0x042A
-#define BD5OAH		0x042B
-#define BD5IST		0x042C
-#define BD5IBC		0x042D
-#define BD5IAL		0x042E
-#define BD5IAH		0x042F
-#define BD6OST		0x0430
-#define BD6OBC		0x0431
-#define BD6OAL		0x0432
-#define BD6OAH		0x0433
-#define BD6IST		0x0434
-#define BD6IBC		0x0435
-#define BD6IAL		0x0436
-#define BD6IAH		0x0437
-#define BD7OST		0x0438
-#define BD7OBC		0x0439
-#define BD7OAL		0x043A
-#define BD7OAH		0x043B
-#define BD7IST		0x043C
-#define BD7IBC		0x043D
-#define BD7IAL		0x043E
-#define BD7IAH		0x043F
-#define BD8OST		0x0440
-#define BD8OBC		0x0441
-#define BD8OAL		0x0442
-#define BD8OAH		0x0443
-#define BD8IST		0x0444
-#define BD8IBC		0x0445
-#define BD8IAL		0x0446
-#define BD8IAH		0x0447
-#define BD9OST		0x0448
-#define BD9OBC		0x0449
-#define BD9OAL		0x044A
-#define BD9OAH		0x044B
-#define BD9IST		0x044C
-#define BD9IBC		0x044D
-#define BD9IAL		0x044E
-#define BD9IAH		0x044F
-#define BD10OST		0x0450
-#define BD10OBC		0x0451
-#define BD10OAL		0x0452
-#define BD10OAH		0x0453
-#define BD10IST		0x0454
-#define BD10IBC		0x0455
-#define BD10IAL		0x0456
-#define BD10IAH		0x0457
-#define BD11OST		0x0458
-#define BD11OBC		0x0459
-#define BD11OAL		0x045A
-#define BD11OAH		0x045B
-#define BD11IST		0x045C
-#define BD11IBC		0x045D
-#define BD11IAL		0x045E
-#define BD11IAH		0x045F
-#define BD12OST		0x0460
-#define BD12OBC		0x0461
-#define BD12OAL		0x0462
-#define BD12OAH		0x0463
-#define BD12IST		0x0464
-#define BD12IBC		0x0465
-#define BD12IAL		0x0466
-#define BD12IAH		0x0467
-#define BD13OST		0x0468
-#define BD13OBC		0x0469
-#define BD13OAL		0x046A
-#define BD13OAH		0x046B
-#define BD13IST		0x046C
-#define BD13IBC		0x046D
-#define BD13IAL		0x046E
-#define BD13IAH		0x046F
-#define BD14OST		0x0470
-#define BD14OBC		0x0471
-#define BD14OAL		0x0472
-#define BD14OAH		0x0473
-#define BD14IST		0x0474
-#define BD14IBC		0x0475
-#define BD14IAL		0x0476
-#define BD14IAH		0x0477
-#define BD15OST		0x0478
-#define BD15OBC		0x0479
-#define BD15OAL		0x047A
-#define BD15OAH		0x047B
-#define BD15IST		0x047C
-#define BD15IBC		0x047D
-#define BD15IAL		0x047E
-#define BD15IAH		0x047F
+#define BD0OST		0x0200
+#define BD0OBC		0x0201
+#define BD0OAL		0x0202
+#define BD0OAH		0x0203
+#define BD0IST		0x0204
+#define BD0IBC		0x0205
+#define BD0IAL		0x0206
+#define BD0IAH		0x0207
+#define BD1OST		0x0208
+#define BD1OBC		0x0209
+#define BD1OAL		0x020A
+#define BD1OAH		0x020B
+#define BD1IST		0x020C
+#define BD1IBC		0x020D
+#define BD1IAL		0x020E
+#define BD1IAH		0x020F
+#define BD2OST		0x0210
+#define BD2OBC		0x0211
+#define BD2OAL		0x0212
+#define BD2OAH		0x0213
+#define BD2IST		0x0214
+#define BD2IBC		0x0215
+#define BD2IAL		0x0216
+#define BD2IAH		0x0217
+#define BD3OST		0x0218
+#define BD3OBC		0x0219
+#define BD3OAL		0x021A
+#define BD3OAH		0x021B
+#define BD3IST		0x021C
+#define BD3IBC		0x021D
+#define BD3IAL		0x021E
+#define BD3IAH		0x021F
+#define BD4OST		0x0220
+#define BD4OBC		0x0221
+#define BD4OAL		0x0222
+#define BD4OAH		0x0223
+#define BD4IST		0x0224
+#define BD4IBC		0x0225
+#define BD4IAL		0x0226
+#define BD4IAH		0x0227
+#define BD5OST		0x0228
+#define BD5OBC		0x0229
+#define BD5OAL		0x022A
+#define BD5OAH		0x022B
+#define BD5IST		0x022C
+#define BD5IBC		0x022D
+#define BD5IAL		0x022E
+#define BD5IAH		0x022F
+#define BD6OST		0x0230
+#define BD6OBC		0x0231
+#define BD6OAL		0x0232
+#define BD6OAH		0x0233
+#define BD6IST		0x0234
+#define BD6IBC		0x0235
+#define BD6IAL		0x0236
+#define BD6IAH		0x0237
+#define BD7OST		0x0238
+#define BD7OBC		0x0239
+#define BD7OAL		0x023A
+#define BD7OAH		0x023B
+#define BD7IST		0x023C
+#define BD7IBC		0x023D
+#define BD7IAL		0x023E
+#define BD7IAH		0x023F
 
-#define USB_Buffer	0x0480		; Register location after last buffer descriptor register
+#define USB_Buffer	0x0280		; Register location after last buffer descriptor register
 
 #define	UOWN		0x07
 
